A monolithic integrated circuit design involves many compromises. For example, choices are made with respect to substrate doping, epitaxial layer characteristics and diffusion profiles which introduce constraints on circuit design specifics through such parameters as breakdown voltage, parasitic capacitance and series parasitic resistance. In circuits required to perform over a wide dynamic range as is the case for most linear circuits, relatively high breakdown voltage is necessary or otherwise can be advantageous. On the other hand, in integrated logic circuits switching speed is usually the primarily desirable characteristic. In all circuits high packing density, that is, providing maximum circuit function using minimum chip volume, is always sought.
Another similarly universal consideration is that of suitable electrical isolation between circuit elements. The undue inclusion of PN junction isolation, for example, can affect overall circuit integration in a very limiting manner.
Partly, at least, in response to meeting these requirements with minimum conflict, it is the practice generally to partition circuits in device compatible parts and integrate the parts onto separate silicon chips. Thus, a chip usually will comprise solely a linear circuit based on bipolar transistors, a low voltage bipolar logic chip, or a memory chip based on insulated gate field effect unipolar transistors. Circuits combining unipolar and bipolar transistors are rather rarely made, and usually involve a lateral bipolar transistor having less desirable characteristics than a standard vertical transistor. Bipolar logic circuits operate at lower voltage levels and are generally based on technologies optimized for high switching speeds. In linear circuits, while speed is also of concern, a higher voltage capability is more essential.
Although a great many of the needs in micro-electronic apparatus are met by relatively large-scale integration in which each chip is used for only one kind of function, there are applications where it is of great advantage to combine otherwise dissimilar designs on a single chip. In particular, it can be of advantage to be able to combine a small amount of logic function, which might involve several NAND gates, with a linear circuit, such as a comparator or analog switch. Such a combination can be economical not only of semiconductor material but also of interconnecting hybrid elements.
One advantageous structural configuration for the fabrication of linear circuits which provide the flexibility and efficiency of complementary bipolar transistors, is disclosed in the application referred to hereinbefore. The technology disclosed in that application relates to a structure allowing a high degree of isolation as provided by a relatively high resistivity substrate and having the latter combined with a relatively thick epitaxial layer as needed to sustain high operating voltages. This is an arrangement not usually regarded as compatible with the constraints of solid state logic technology.
Integrated injection logic as disclosed for example in U.S. Pat. Nos. 3,643,235, 3,823,353 and 3,922,565 has become available recently as a form of logic which is readily manufacturable and provides good packing density and performance characteristics. One object of this invention is a method of making integrated injection logic gates using the processing techniques of the complementary bipolar transistor technology permitting the combination of integrated injection logic and linear circuits on a single chip.
A further object is an injection logic structure in which both the current source transistor and the switching transistor are of the vertical type and are ideally optimized from the standpoint of injection efficiency and saturation voltage.